Function on Clock #43

New issue

Closed

opened 2019-01-28 21:32:02 +00:00 by Riolaurenti · 2 comments

Riolaurenti commented

2019-01-28 21:32:02 +00:00

(Migrated from github.com)

#34
Opened separate issue for 'Sequencing'
WIZ------MASTER ---- --- A/B/C/D...

Aim: To control division of incoming OSC clock signals from the Master via Routers to LED's.

Current Objective: Send change function message every 4/8/16/32 beats.
Secondary Objective: Send change function in ratio to CLK#1, eg every 3/4 beats to router A/B.

First steps are to debug IIC on master, check for unwarranted activity when interacting with HC05 and PJON.

#34 Opened separate issue for 'Sequencing' WIZ---<I2C>---MASTER ---- <PJON>--- A/B/C/D... Aim: To control division of incoming OSC clock signals from the Master via Routers to LED's. Current Objective: Send change function message every 4/8/16/32 beats. Secondary Objective: Send change function in ratio to CLK#1, eg every 3/4 beats to router A/B. First steps are to debug IIC on master, check for unwarranted activity when interacting with HC05 and PJON.

Squatnet commented

2019-01-31 21:10:28 +00:00

(Migrated from github.com)

I2C on master was troublesome, Probably due to interrupts.
WizNet sends messages to master via PJON, Seems to work well.

I2C on master was troublesome, Probably due to interrupts. WizNet sends messages to master via PJON, Seems to work well.

Squatnet commented

2019-02-10 16:42:43 +00:00

(Migrated from github.com)

Move to close this with #50